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» Effect of Delays on TCP Performance
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ASPDAC
2004
ACM
85views Hardware» more  ASPDAC 2004»
15 years 3 months ago
Integrating buffer planning with floorplanning for simultaneous multi-objective optimization
As the process technology advances into the deep submicron era, interconnect plays a dominant role in determining circuit performance and signal integrity. Buffer insertion is one...
Yi-Hui Cheng, Yao-Wen Chang
INFOCOM
2003
IEEE
15 years 3 months ago
Integrating effective-bandwidth-based QoS routing and best effort routing
—A methodology is presented for integrating effective-bandwidth-based routing for QoS-sensitive traffic and datagram routing of the best-effort traffic. To prevent excessive dela...
Stephen L. Spitler, Daniel C. Lee
MICRO
1997
IEEE
76views Hardware» more  MICRO 1997»
15 years 2 months ago
A Framework for Balancing Control Flow and Predication
Predicated execution is a promising architectural feature for exploiting instruction-level parallelism in the presence of control flow. Compiling for predicated execution involve...
David I. August, Wen-mei W. Hwu, Scott A. Mahlke
ISCA
1995
IEEE
120views Hardware» more  ISCA 1995»
15 years 1 months ago
Streamlining Data Cache Access with Fast Address Calculation
For many programs, especially integer codes, untolerated load instruction latencies account for a significant portion of total execution time. In this paper, we present the desig...
Todd M. Austin, Dionisios N. Pnevmatikatos, Gurind...
SMC
2010
IEEE
228views Control Systems» more  SMC 2010»
14 years 8 months ago
A safe communication scheme for an intelligent Wireless Networked Control System Coordination Agent
Abstract— Wireless networked control systems have begun to gain acceptance during the last decade, largely due to the increased flexibility and lower costs they promise to provi...
James H. Taylor, Hazem M. S. Ibrahim, Jeff Slipp, ...