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DAC
2005
ACM
15 years 10 months ago
Multilevel full-chip routing for the X-based architecture
As technology advances into the nanometer territory, the interconnect delay has become a first-order effect on chip performance. To handle this effect, the X-architecture has been...
Tsung-Yi Ho, Chen-Feng Chang, Yao-Wen Chang, Sao-J...
DSD
2009
IEEE
136views Hardware» more  DSD 2009»
15 years 1 months ago
An Evaluation of Behaviors of S-NUCA CMPs Running Scientific Workload
Modern systems are able to put two or more processors on the same die (Chip Multiprocessors, CMP), each with its private caches, while the last level caches can be either private ...
Pierfrancesco Foglia, Francesco Panicucci, Cosimo ...
WWW
2005
ACM
15 years 10 months ago
Analysis of multimedia workloads with implications for internet streaming
In this paper, we study the media workload collected from a large number of commercial Web sites hosted by a major ISP and that collected from a large group of home users connecte...
Lei Guo, Songqing Chen, Zhen Xiao, Xiaodong Zhang
PODC
2009
ACM
15 years 10 months ago
Load balancing without regret in the bulletin board model
We analyze the performance of protocols for load balancing in distributed systems based on no-regret algorithms from online learning theory. These protocols treat load balancing a...
Éva Tardos, Georgios Piliouras, Robert D. K...
ICDCSW
2005
IEEE
15 years 3 months ago
Control Theory Optimization of MECN in Satellite Networks
Congestion in the Internet results in wasted bandwidth and also stands in the way of guaranteeing QoS. The effect of congestion is multiplied many fold in Satellite networks, wher...
Arjan Durresi, Mukundan Sridharan, Sriram Chellapp...