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CORR
2011
Springer
181views Education» more  CORR 2011»
14 years 4 months ago
Study of Throughput and Delay in Finite-Buffer Line Networks
—In this work, we study the effects of finite buffers on the throughput and delay of line networks with erasure links. We identify the calculation of performance parameters such...
Badri N. Vellambi, Nima Torabkhani, Faramarz Fekri
GLVLSI
2008
IEEE
117views VLSI» more  GLVLSI 2008»
15 years 4 months ago
Delay driven AIG restructuring using slack budget management
Timing optimizations during logic synthesis has become a necessary step to achieve timing closure in VLSI designs. This often involves “shortening” all paths found in the circ...
Andrew C. Ling, Jianwen Zhu, Stephen Dean Brown
ATS
2009
IEEE
92views Hardware» more  ATS 2009»
14 years 7 months ago
M-IVC: Using Multiple Input Vectors to Minimize Aging-Induced Delay
Negative bias temperature instability (NBTI) has been a significant reliability concern in current digital circuit design due to its effect of increasing the path delay with time a...
Song Jin, Yinhe Han, Lei Zhang 0008, Huawei Li, Xi...
ICSE
2012
IEEE-ACM
13 years 6 days ago
Performance debugging in the large via mining millions of stack traces
—Given limited resource and time before software release, development-site testing and debugging become more and more insufficient to ensure satisfactory software performance. As...
Shi Han, Yingnong Dang, Song Ge, Dongmei Zhang, Ta...
ICC
2009
IEEE
175views Communications» more  ICC 2009»
15 years 4 months ago
Effective Capacity Maximization in Multi-Antenna Channels with Covariance Feedback
Abstract—The optimal transmit strategies of single-user multiantenna systems with respect to average capacity maximization are well understood. However, the performance measure d...
Eduard A. Jorswieck, Rami Mochaourab, Martin Mitte...