911 search results - page 71 / 183 » Effect of Delays on TCP Performance |
APCSAC
2005
IEEE
15 years 3 months ago
2005
IEEE
Continuing advances in semiconductor technology and demand for higher performance will lead to more powerful, superpipelined and wider issue processors. Instruction caches in such ...
CN
2007
14 years 9 months ago
2007
— In this paper we perform a detailed analysis of point-to-point packet delay in an operational tier-1 network. The point-to-point delay is the time between a packet entering a r...
IOLTS
2000
IEEE
15 years 2 months ago
2000
IEEE
The combination of higher quality requirements and sensitivity of high performance circuits to delay defects has led to an increasing emphasis on delay testing of VLSI circuits. A...
ISQED
2003
IEEE
15 years 3 months ago
2003
IEEE
In this paper we propose a new design methodology targeted for core-based designs using parameterized macrocells (PMC’s). This methodology provides the flexibility for instance...
VTS
2000
IEEE
15 years 2 months ago
2000
IEEE
1 This paper addresses the problem of testing path delay faults in a microprocessor using instructions. It is observed that a structurally testable path (i.e., a path testable thro...