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ISVLSI
2008
IEEE
142views VLSI» more  ISVLSI 2008»
15 years 4 months ago
A Fuzzy Approach for Variation Aware Buffer Insertion and Driver Sizing
In nanometer regime, the effects of process variations are dominating circuit performance, power and reliability of circuits. Hence, it is important to properly manage variation e...
Venkataraman Mahalingam, Nagarajan Ranganathan
GLOBECOM
2009
IEEE
14 years 7 months ago
Quality-of-Service in Cognitive Radio Networks with Collaborative Sensing
Uncertain capacity in newly emerged Cognitive Radio Networks(CRN) renders specific performance analysis for the secondary users (SUs), particularly in the aspects of Qualityof-Serv...
Caoxie Zhang, Xinbing Wang, Xinping Guan, Hsiao-Hw...
SIGCOMM
1999
ACM
15 years 2 months ago
An Integrated Congestion Management Architecture for Internet Hosts
This paper presents a novel framework for managing network congestion from an end-to-end perspective. Our work is motivated by several trends in traffic patterns that threaten th...
Hari Balakrishnan, Hariharan Shankar Rahul, Sriniv...
ICCD
2000
IEEE
123views Hardware» more  ICCD 2000»
15 years 6 months ago
Analysis and Optimization of Ground Bounce in Digital CMOS Circuits
This paper is concerned with the analysis and optimization of the ground bounce in digital CMOS circuits. First, an analytical method for calculating of the ground bounce is presen...
Payam Heydari, Massoud Pedram
CAL
2007
14 years 9 months ago
Microarchitectures for Managing Chip Revenues under Process Variations
—As transistor feature sizes continue to shrink into the sub-90nm range and beyond, the effects of process variations on critical path delay and chip yields have amplified. A com...
Abhishek Das, Serkan Ozdemir, Gokhan Memik, Joseph...