In this paper, we present an analytical model for the approximate calculation of the throughput and end-toend delay performance in single hop and multihop IEEE 802.11 networks unde...
We study gate delay variation caused by crosstalk aggressor alignment, i.e., difference of signal arrival times in coupled neighboring interconnects. This effect is as significan...
This paper describes an experimental investigation into the relationship of delay to user performance in 3D object placement. In the first experiment, 10 participants performed a ...
Benjamin Watson, Neff Walker, Peter Woytiuk, Willi...
A delay abstraction of a combinational module is a compact representation of the delay information of the module, which carries effective pin-to-pin delay for each primary-input/pr...
With process technology and functional integration advancing steadily, chips are continuing to grow in area while critical dimensions are shrinking. This has led to the emergence o...
Yehia Massoud, Steve S. Majors, Jamil Kawa, Tareq ...