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ICC
2007
IEEE
165views Communications» more  ICC 2007»
15 years 6 months ago
Throughput and Delay Analysis of Multihop IEEE 802.11 Networks with Capture
In this paper, we present an analytical model for the approximate calculation of the throughput and end-toend delay performance in single hop and multihop IEEE 802.11 networks unde...
Rima Khalaf, Izhak Rubin, Ju-Lan Hsu
GLVLSI
2006
IEEE
113views VLSI» more  GLVLSI 2006»
15 years 5 months ago
Statistical gate delay calculation with crosstalk alignment consideration
We study gate delay variation caused by crosstalk aggressor alignment, i.e., difference of signal arrival times in coupled neighboring interconnects. This effect is as significan...
Andrew B. Kahng, Bao Liu, Xu Xu
VR
2003
IEEE
128views Virtual Reality» more  VR 2003»
15 years 5 months ago
Maintaining Usability During 3D Placement Despite Delay
This paper describes an experimental investigation into the relationship of delay to user performance in 3D object placement. In the first experiment, 10 participants performed a ...
Benjamin Watson, Neff Walker, Peter Woytiuk, Willi...
ICCAD
1999
IEEE
66views Hardware» more  ICCAD 1999»
15 years 4 months ago
Timing-safe false path removal for combinational modules
A delay abstraction of a combinational module is a compact representation of the delay information of the module, which carries effective pin-to-pin delay for each primary-input/pr...
Yuji Kukimoto, Robert K. Brayton
TVLSI
2002
78views more  TVLSI 2002»
14 years 11 months ago
Managing on-chip inductive effects
With process technology and functional integration advancing steadily, chips are continuing to grow in area while critical dimensions are shrinking. This has led to the emergence o...
Yehia Massoud, Steve S. Majors, Jamil Kawa, Tareq ...