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HICSS
2003
IEEE
99views Biometrics» more  HICSS 2003»
15 years 3 months ago
Financial Model-Base Construction for Flexible Model Manipulation of Models and Solvers
As financial markets are volatile and rapidly changing, preciseness and agility in price evaluation and risk assessment in the portfolios are more important and decision support s...
Keun-Woo Lee, Soon-Young Huh
ISCA
2003
IEEE
88views Hardware» more  ISCA 2003»
15 years 3 months ago
Dynamically Managing the Communication-Parallelism Trade-off in Future Clustered Processors
Clustered microarchitectures are an attractive alternative to large monolithic superscalar designs due to their potential for higher clock rates in the face of increasingly wire-d...
Rajeev Balasubramonian, Sandhya Dwarkadas, David H...
ISCAS
2003
IEEE
97views Hardware» more  ISCAS 2003»
15 years 3 months ago
Watermark re-synchronization using log-polar mapping of image autocorrelation
Many watermarking algorithms embed the watermark into the image as contiguous non-overlapping tiles. This tiling structure forms an implicit synchronization template that can be r...
Adnan M. Alattar, Joel Meyer
SIBGRAPI
2003
IEEE
15 years 3 months ago
Picking and Snapping for 3D Input Devices
A picking mechanism (pointing and indicating) with the cursor is essential for any direct-manipulation application. The windowing systems, under which control a direct-manipulation...
Shin-Ting Wu, Marcel Abrantes, Daniel Tost, Harlen...
ISLPED
2003
ACM
155views Hardware» more  ISLPED 2003»
15 years 3 months ago
Low-power high-level synthesis for FPGA architectures
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...
Deming Chen, Jason Cong, Yiping Fan