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» Effective Iterative Techniques for Fingerprinting Design IP
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AAAI
2000
14 years 11 months ago
Iterative Flattening: A Scalable Method for Solving Multi-Capacity Scheduling Problems
One challenge for research in constraint-based scheduling has been to produce scalable solution procedures under fairly general representational assumptions. Quite often, the comp...
Amedeo Cesta, Angelo Oddi, Stephen F. Smith
DATE
2004
IEEE
210views Hardware» more  DATE 2004»
15 years 1 months ago
Loop Shifting and Compaction for the High-Level Synthesis of Designs with Complex Control Flow
Emerging embedded system applications in multimedia and image processing are characterized by complex control flow consisting of deeply nested conditionals and loops. We present a...
Sumit Gupta, Nikil Dutt, Rajesh Gupta, Alexandru N...
HOST
2009
IEEE
15 years 4 months ago
Secure IP-Block Distribution for Hardware Devices
—EDA vendors have proposed a standard for the sharing of IP among vendors to be used in the design and development of IP for FPGAs. Although, we do not propose any attacks, we sh...
Jorge Guajardo, Tim Güneysu, Sandeep S. Kumar...
FPL
2009
Springer
106views Hardware» more  FPL 2009»
15 years 25 days ago
An ASIC perspective on FPGA optimizations
In this paper we discuss how various design components perform in both FPGAs and standard cell based ASICs. We also investigate how various common FPGA optimizations will effect t...
Andreas Ehliar, Dake Liu
ICIP
2006
IEEE
15 years 11 months ago
Optimum Watermark Design by Vector Space Projections
We introduce an optimum watermark embedding technique that satisfies common watermarking requirements such as visual fidelity, sufficient embedding rate, robustness against noise ...
Oktay Altun, Gaurav Sharma, Mark F. Bocko