283 search results - page 11 / 57 » Effective Program Verification for Relaxed Memory Models |
113
Voted
ASPDAC
2011
ACM
14 years 3 months ago
2011
ACM
This paper studies realization and performance comparison of the sequential and weak consistency models in the network-on-chip (NoC) based distributed shared memory (DSM) multi-cor...
108
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PPOPP
2010
ACM
15 years 9 months ago
2010
ACM
As concurrent programming becomes prevalent, software providers are investing in concurrency libraries to improve programmer productivity. Concurrency libraries improve productivi...
101
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EURODAC
1994
IEEE
15 years 3 months ago
1994
IEEE
- The accelerator is destined to circuit-level simulation of digital and analog/digital MOS VLSI'c containing of up to 100 thousand transistors (with 16 Mb RAM host-machine). ...
EMSOFT
2007
Springer
15 years 3 months ago
2007
Springer
The soundness of device drivers generally cannot be verified in isolation, but has to take into account the reactions of the hardware devices. In critical embedded systems, interf...
85
Voted
LISP
2008
14 years 11 months ago
2008
Trace effects are statically generated program abstractions, that can be model checked for verification of assertions in a temporal program logic. In this paper we develop a type a...