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FMCAD
2000
Springer
15 years 3 months ago
A Methodology for Large-Scale Hardware Verification
Abstract. We present a formal verification methodology for datapathdominated hardware. This provides a systematic but flexible framework within which to organize the activities und...
Mark Aagaard, Robert B. Jones, Thomas F. Melham, J...
HPCA
2005
IEEE
16 years 1 days ago
Using Virtual Load/Store Queues (VLSQs) to Reduce the Negative Effects of Reordered Memory Instructions
The use of large instruction windows coupled with aggressive out-oforder and prefetching capabilities has provided significant improvements in processor performance. In this paper...
Aamer Jaleel, Bruce L. Jacob
ENTCS
2006
173views more  ENTCS 2006»
14 years 11 months ago
Concurrent LSC Verification: On Decomposition Properties of Partially Ordered Symbolic Automata
Partially Ordered Symbolic Automata (POSAs) are used as the semantical foundation of visual formalisms like the scenario based language of Live Sequence Charts (LSCs). To check whe...
Tobe Toben, Bernd Westphal
108
Voted
IEEEPACT
1998
IEEE
15 years 3 months ago
Sirocco: Cost-Effective Fine-Grain Distributed Shared Memory
Software fine-grain distributed shared memory (FGDSM) provides a simplified shared-memory programming interface with minimal or no hardware support. Originally software FGDSMs tar...
Ioannis Schoinas, Babak Falsafi, Mark D. Hill, Jam...
HASE
1998
IEEE
15 years 3 months ago
Verification in Concurrent Programming with Petri Nets Structural Techniques
This paper deals with verification of flow control in concurrent programs. We use Ada language model as reference. After translation of Ada programs into Petri nets (named Ada net...
Kamel Barkaoui, Jean-François Pradat-Peyre