283 search results - page 26 / 57 » Effective Program Verification for Relaxed Memory Models |
IEEEPACT
2009
IEEE
15 years 6 months ago
2009
IEEE
Abstract—Load elimination is a classical compiler transformation that is increasing in importance for multi-core and many-core architectures. The effect of the transformation is ...
91
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SAS
2007
Springer
15 years 5 months ago
2007
Springer
We present a new pointer analysis for use in shared memory programs running on hierarchical parallel machines. The analysis is motivated by the partitioned global address space lan...
HPCA
2008
IEEE
16 years 2 days ago
2008
IEEE
The continued scaling of device dimensions and the operating voltage reduces the critical charge and thus natural noise tolerance level of transistors. As a result, circuits can p...
114
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PLDI
2009
ACM
15 years 6 months ago
2009
ACM
Multicore designs have emerged as the mainstream design paradigm for the microprocessor industry. Unfortunately, providing multiple cores does not directly translate into performa...
101
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DEBU
2008
14 years 11 months ago
2008
Data-driven Web services, viewed broadly as interactive systems available on the Web for users and programs, provide the backbone for increasingly complex Web applications. While ...