Fault-tolerant distributed real-time systems are presently facing a lot of new challenges. Although many techniques provide effective masking of node failures on the architectural...
This paper introduces a dynamic layout optimization strategy to minimize the number of cycles spent in memory accesses in a cache-based memory environment. In this approach, a giv...
N. E. Crosbie, Mahmut T. Kandemir, Ibrahim Kolcu, ...
We describe several software side-channel attacks based on inter-process leakage through the state of the CPU's memory cache. This leakage reveals memory access patterns, whic...
Dynamic binary translation (DBT) is a powerful technique that enables fine-grained monitoring and manipulation of an existing program binary. At the user level, it has been emplo...
This contribution reports on ongoing collaborative research at the University of Stanford, Department of Psychology, and the University of Hamburg, Department for Informatics. Ext...