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JCST
2008
94views more  JCST 2008»
14 years 9 months ago
Runtime Engine for Dynamic Profile Guided Stride Prefetching
Stride prefetching is recognized as an important technique to improve memory access performance. The prior work usually profiles and/or analyzes the program behavior offline, and u...
Qiong Zou, Xiao-Feng Li, Long-Bing Zhang
DATE
2010
IEEE
165views Hardware» more  DATE 2010»
15 years 2 months ago
Multicore soft error rate stabilization using adaptive dual modular redundancy
— The use of dynamic voltage and frequency scaling (DVFS) in contemporary multicores provides significant protection from unpredictable thermal events. A side effect of DVFS can ...
Ramakrishna Vadlamani, Jia Zhao, Wayne P. Burleson...
ICCAD
2009
IEEE
109views Hardware» more  ICCAD 2009»
14 years 7 months ago
Energy reduction for STT-RAM using early write termination
The emerging Spin Torque Transfer memory (STT-RAM) is a promising candidate for future on-chip caches due to STT-RAM's high density, low leakage, long endurance and high acce...
Ping Zhou, Bo Zhao, Jun Yang 0002, Youtao Zhang
ISCA
2009
IEEE
143views Hardware» more  ISCA 2009»
15 years 4 months ago
Spatio-temporal memory streaming
Recent research advocates memory streaming techniques to alleviate the performance bottleneck caused by the high latencies of off-chip memory accesses. Temporal memory streaming r...
Stephen Somogyi, Thomas F. Wenisch, Anastasia Aila...
ISCA
2007
IEEE
168views Hardware» more  ISCA 2007»
15 years 4 months ago
Limiting the power consumption of main memory
The peak power consumption of hardware components affects their power supply, packaging, and cooling requirements. When the peak power consumption is high, the hardware components...
Bruno Diniz, Dorgival Olavo Guedes Neto, Wagner Me...