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94
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HPCA
2001
IEEE
15 years 10 months ago
Reevaluating Online Superpage Promotion with Hardware Support
fipical translation lookaside buffers (TLBs)can map a far smaller region of memory than application footprints demand, and the cost of handling TLB misses therefore limits the per...
Zhen Fang, Lixin Zhang, John B. Carter, Wilson C. ...
ICSE
2009
IEEE-ACM
15 years 4 months ago
DYVISE: Performance analysis of production systems research demonstration
Many of today’s complex systems are multithreaded servers that effectively run forever and need to work under varying loads and environments. Understanding the behavior of such ...
Steven P. Reiss
ACMSE
2004
ACM
15 years 3 months ago
Performance evaluation of cache replacement policies for the SPEC CPU2000 benchmark suite
Replacement policy, one of the key factors determining the effectiveness of a cache, becomes even more important with latest technological trends toward highly associative caches....
Hussein Al-Zoubi, Aleksandar Milenkovic, Milena Mi...
97
Voted
HPCA
2008
IEEE
15 years 10 months ago
Gaining insights into multicore cache partitioning: Bridging the gap between simulation and real systems
Cache partitioning and sharing is critical to the effective utilization of multicore processors. However, almost all existing studies have been evaluated by simulation that often ...
Jiang Lin, Qingda Lu, Xiaoning Ding, Zhao Zhang, X...
ISCA
1993
IEEE
125views Hardware» more  ISCA 1993»
15 years 1 months ago
Evaluation of Mechanisms for Fine-Grained Parallel Programs in the J-Machine and the CM-5
er uses an abstract machine approach to compare the mechanisms of two parallel machines: the J-Machine and the CM-5. High-level parallel programs are translated by a single optimi...
Ellen Spertus, Seth Copen Goldstein, Klaus E. Scha...