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122
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ECRTS
2009
IEEE
14 years 10 months ago
Using Randomized Caches in Probabilistic Real-Time Systems
While hardware caches are generally effective at improving application performance, they greatly complicate performance prediction. Slight changes in memory layout or data access p...
Eduardo Quiñones, Emery D. Berger, Guillem ...
ISCA
2002
IEEE
91views Hardware» more  ISCA 2002»
15 years 5 months ago
Slack: Maximizing Performance Under Technological Constraints
Many emerging processor microarchitectures seek to manage technological constraints (e.g., wire delay, power, and circuit complexity) by resorting to nonuniform designs that provi...
Brian A. Fields, Rastislav Bodík, Mark D. H...
115
Voted
OSDI
1996
ACM
15 years 1 months ago
CPU Inheritance Scheduling
Traditional processor scheduling mechanisms in operating systems are fairly rigid, often supportingonly one fixed scheduling policy, or, at most, a few "scheduling classes&qu...
Bryan Ford, Sai Susarla
139
Voted
CODES
2005
IEEE
15 years 6 months ago
Enhancing security through hardware-assisted run-time validation of program data properties
The growing number of information security breaches in electronic and computing systems calls for new design paradigms that consider security as a primary design objective. This i...
Divya Arora, Anand Raghunathan, Srivaths Ravi, Nir...
92
Voted
CORR
2008
Springer
132views Education» more  CORR 2008»
15 years 19 days ago
Dynamic Rate Allocation in Fading Multiple-access Channels
We consider the problem of rate allocation in a fading Gaussian multiple-access channel (MAC) with fixed transmission powers. Our goal is to maximize a general concave utility func...
Ali ParandehGheibi, Atilla Eryilmaz, Asuman E. Ozd...