61 search results - page 6 / 13 » Effectively sharing a cache among threads |
ICS
2004
Tsinghua U.
15 years 3 months ago
2004
Tsinghua U.
Cache hierarchies have been traditionally designed for usage by a single application, thread or core. As multi-threaded (MT) and multi-core (CMP) platform architectures emerge and...
ICCD
2005
IEEE
15 years 6 months ago
2005
IEEE
Simultaneous multithreading (SMT) seeks to improve the computation throughput of a processor core by sharing primary resources such as functional units, issue bandwidth, and cache...
MSE
2002
IEEE
15 years 2 months ago
2002
IEEE
This paper presents the study of running several core multimedia applications on a simultaneous multithreading (SMT) architecture and derives design principles for multimedia soft...
91
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EUROPAR
2010
Springer
14 years 10 months ago
2010
Springer
Abstract. This paper is motivated by the desire to provide an efficient and scalable software cache implementation of OpenMP on multicore and manycore architectures in general, and...
128
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HIPEAC
2011
Springer
13 years 9 months ago
2011
Springer
In chip multiprocessors (CMPs), data accesslatency dependson the memory hierarchy organization, the on-chip interconnect (NoC), and the running workload. Reducing data access late...