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ISQED
2007
IEEE
127views Hardware» more  ISQED 2007»
15 years 3 months ago
Sensitivity Based Link Insertion for Variation Tolerant Clock Network Synthesis
Clock distribution is one of the key limiting factors in any high speed, sub-100nm VLSI design. Unwanted clock skews, caused by variation effects like manufacturing variations, po...
Joon-Sung Yang, Anand Rajaram, Ninghy Shi, Jian Ch...
ASPDAC
2009
ACM
102views Hardware» more  ASPDAC 2009»
15 years 4 months ago
Stochastic current prediction enabled frequency actuator for runtime resonance noise reduction
Power delivery network (PDN) is a distributed RLC network with its dominant resonance frequency in the low-to-middle frequency range. Though high-performance chips’ working freq...
Yiyu Shi, Jinjun Xiong, Howard Chen, Lei He
BROADNETS
2007
IEEE
14 years 11 months ago
Connection provisioning in QoT-guaranteed distributed all-optical networks
— As an optical signal propagates along a lightpath to its destination in wavelength-routed optical networks (WRONs), the quality of transmission (QoT) is degraded by transmissio...
Jun He, Maïté Brandt-Pearce, Suresh Su...
CSE
2009
IEEE
15 years 4 months ago
Prospector: Multiscale Energy Measurement of Networked Embedded Systems with Wideband Power Signals
Abstract—Today’s wirelessly networked embedded systems underlie a vast array of electronic devices, performing computation, communication, and input/output. A major design goal...
Kenji R. Yamamoto, Paul G. Flikkema
INTEGRATION
2007
95views more  INTEGRATION 2007»
14 years 9 months ago
Wire shaping of RLC interconnects
The optimum wire shape to produce the minimum signal propagation delay across an RLC line is shown to exhibit a general exponential form. The line inductance makes exponential tap...
Magdy A. El-Moursy, Eby G. Friedman