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SAC
2010
ACM
14 years 10 months ago
Efficient mapping and voltage islanding technique for energy minimization in NoC under design constraints
Voltage islanding technique in Network-on-Chip (NoC) can significantly reduce the computational energy consumption by scaling down the voltage levels of the processing elements (P...
Pavel Ghosh, Arunabha Sen
ISCAS
2007
IEEE
136views Hardware» more  ISCAS 2007»
15 years 4 months ago
Flexible Low Power Probability Density Estimation Unit For Speech Recognition
— This paper describes the hardware architecture for a flexible probability density estimation unit to be used in a Large Vocabulary Speech Recognition System, and targeted for m...
Ullas Pazhayaveetil, Dhruba Chandra, Paul Franzon
AI
1998
Springer
15 years 2 months ago
Temporally Invariant Junction Tree for Inference in Dynamic Bayesian Network
Abstract. Dynamic Bayesian networks (DBNs) extend Bayesian networks from static domains to dynamic domains. The only known generic method for exact inference in DBNs is based on dy...
Yang Xiang
CLUSTER
2001
IEEE
15 years 1 months ago
Parallel Standard Cell Placement on a Cluster of Workstations
In this paper we report experiences on a parallel implementation of a standard cell placement algorithm on a cluster of myrinet connected PCs. The proposed algorithm is based on a...
Faris H. Khundakjie, Patrick H. Madden, Nael B. Ab...
FMCO
2008
Springer
143views Formal Methods» more  FMCO 2008»
14 years 11 months ago
An Asynchronous Distributed Component Model and Its Semantics
This paper is placed in the context of large scale distributed programming, providing a programming model based on asynchronous components. It focuses on the semantics of asynchron...
Ludovic Henrio, Florian Kammüller, Marcela Ri...