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ISSS
1999
IEEE
151views Hardware» more  ISSS 1999»
15 years 1 months ago
Optimized System Synthesis of Complex RT Level Building Blocks from Multirate Dataflow Graphs
In order to cope with the ever increasing complexity of todays application specific integrated circuits, a building block based design methodology is established. The system is co...
Jens Horstmannshoff, Heinrich Meyr
IPPS
2005
IEEE
15 years 3 months ago
Improvement of Power-Performance Efficiency for High-End Computing
Left unchecked, the fundamental drive to increase peak performance using tens of thousands of power hungry components will lead to intolerable operating costs and failure rates. R...
Rong Ge, Xizhou Feng, Kirk W. Cameron
ICCAD
2009
IEEE
179views Hardware» more  ICCAD 2009»
14 years 7 months ago
Automatic memory partitioning and scheduling for throughput and power optimization
Hardware acceleration is crucial in modern embedded system design to meet the explosive demands on performance and cost. Selected computation kernels for acceleration are usually ...
Jason Cong, Wei Jiang, Bin Liu, Yi Zou
ICDCSW
2002
IEEE
15 years 2 months ago
Efficient Massive Sharing of Content among Peers
In this paper we focus on the design of high performance peer-to-peer content sharing systems. In particular, our goal is to achieve global load balancing and short user-request r...
Peter Triantafillou, Chryssani Xiruhaki, Manolis K...
KDD
2005
ACM
92views Data Mining» more  KDD 2005»
15 years 9 months ago
Summarizing itemset patterns: a profile-based approach
Frequent-pattern mining has been studied extensively on scalable methods for mining various kinds of patterns including itemsets, sequences, and graphs. However, the bottleneck of...
Xifeng Yan, Hong Cheng, Jiawei Han, Dong Xin