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PATMOS
2005
Springer
15 years 3 months ago
A Power-Efficient and Scalable Load-Store Queue Design
Abstract. The load-store queue (LQ-SQ) of modern superscalar processors is responsible for keeping the order of memory operations. As the performance gap between processing speed a...
Fernando Castro, Daniel Chaver, Luis Piñuel...
80
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LCN
2007
IEEE
15 years 4 months ago
An Initial Performance Evaluation of Rapid PHY Selection (RPS) for Energy Efficient Ethernet
— The IEEE 802.3 Energy Efficient Ethernet (EEE) study group is considering Rapid PHY Selection (RPS) as a mechanism to quickly switch the data rate of an Ethernet link to match ...
Francisco Blanquicet, Kenneth J. Christensen
IJRR
2002
86views more  IJRR 2002»
14 years 9 months ago
An Experimental Robot Load Identification Method for Industrial Application
Abstract. This paper discusses a new experimental robot load identification method that is used in industry. The method is based on periodic robot excitation and the maximum likeli...
Jan Swevers, Walter Verdonck, Birgit Naumer, Stefa...
ASPLOS
2006
ACM
15 years 1 months ago
SlicK: slice-based locality exploitation for efficient redundant multithreading
Transient faults are expected a be a major design consideration in future microprocessors. Recent proposals for transient fault detection in processor cores have revolved around t...
Angshuman Parashar, Anand Sivasubramaniam, Sudhanv...
ISCA
2005
IEEE
166views Hardware» more  ISCA 2005»
15 years 3 months ago
Increased Scalability and Power Efficiency by Using Multiple Speed Pipelines
One of the most important problems faced by microarchitecture designers is the poor scalability of some of the current solutions with increased clock frequencies and wider pipelin...
Emil Talpes, Diana Marculescu