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IPPS
1999
IEEE
15 years 9 months ago
Reducing I/O Complexity by Simulating Coarse Grained Parallel Algorithms
Block-wise access to data is a central theme in the design of efficient external memory (EM) algorithms. A second important issue, when more than one disk is present, is fully par...
Frank K. H. A. Dehne, David A. Hutchinson, Anil Ma...
CEC
2007
IEEE
15 years 11 months ago
Constrained genetic algorithm based independent component analysis
Independent Component Analysis, a computationally efficient statistical signal processing technique, has been an area of interest for researchers for many practical applications in...
D. P. Acharya, Ganapati Panda, Y. V. S. Lakshmi
PARELEC
2002
IEEE
15 years 9 months ago
Techniques for Optimization of Net Algorithms
In this paper, techniques for optimization of net algorithms describing parallel asynchronous computations and derived from cycling and branching behavioral descriptions are prese...
Anatoly Prihozhy, Daniel Mlynek, Michail Solomenni...
VLSID
2002
IEEE
192views VLSI» more  VLSID 2002»
15 years 9 months ago
Static and Dynamic Variable Voltage Scheduling Algorithms for Real-Time Heterogeneous Distributed Embedded Systems
à This paper addresses the problem of static and dynamic variable voltage scheduling of multi-rate periodic task graphs (i.e., tasks with precedence relationships) and aperiodic t...
Jiong Luo, Niraj K. Jha
EVOW
2006
Springer
15 years 8 months ago
Optimisation of Constant Matrix Multiplication Operation Hardware Using a Genetic Algorithm
Abstract. The efficient design of multiplierless implementations of constant matrix multipliers is challenged by the huge solution search spaces even for small scale problems. Prev...
Andrew Kinane, Valentin Muresan, Noel E. O'Connor