For a logic design with level-sensitive latches, we need to validate timing signal paths which may flush through several latches. We developed efficient algorithms based on the mo...
—Hardware-managed caches introduce large amounts of timing variability, complicating real-time system design. One alternative is a memory system with scratchpad memories which im...
Motivated by applications in grid computing and projects management, we study multiprocessor scheduling in scenarios where there is uncertainty in the successful execution of jobs...
We discuss scheduling problems with m identical machines and n jobs where each job has to be assigned to some machine. The goal is to optimize objective functions that solely depe...
Noga Alon, Yossi Azar, Gerhard J. Woeginger, Tal Y...
We study single machine scheduling problems, where processing times of the jobs are exponential functions of their start times. For increasing functions, we prove strong NP-hardnes...