We investigate the problem of sleep/wake scheduling for low duty cycle sensor networks. Our work differs from prior work in that we explicitly consider the effect of synchronizati...
The inherent redundancy and in-the-field reconfiguration capabilities of field programmable gate arrays (FPGAs) provide alternatives to integrated circuit redundancy-based fault r...
John Lach, William H. Mangione-Smith, Miodrag Potk...
—Scheduling task graphs under hard (end-to-end) timing constraints is an extensively studied NP-hard problem of critical importance for predictable software mapping on Multiproce...
High availability plays an important role in heterogeneous clusters, where processors operate at different speeds and are not continuously available for processing. Existing sched...
The growing use of digital signal processors (DSPs) in embedded systems necessitates the use of optimizing compilers supporting special hardware features. Due to the irregular arc...