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EGH
2010
Springer
14 years 7 months ago
Parallel SAH k-D tree construction
The k-D tree is a well-studied acceleration data structure for ray tracing. It is used to organize primitives in a scene to allow efficient execution of intersection operations be...
Byn Choi, Rakesh Komuravelli, Victor Lu, Hyojin Su...
BMCBI
2010
97views more  BMCBI 2010»
14 years 7 months ago
Preprocessing of gene expression data by optimally robust estimators
Background: The preprocessing of gene expression data obtained from several platforms routinely includes the aggregation of multiple raw signal intensities to one expression value...
Matthias Kohl, Hans-Peter Deigner
ICCD
2001
IEEE
121views Hardware» more  ICCD 2001»
15 years 6 months ago
Determining Schedules for Reducing Power Consumption Using Multiple Supply Voltages
Dynamic power is the main source of power consumption in CMOS circuits. It depends on the square of the supply voltage. It may significantly be reduced by scaling down the supply ...
Noureddine Chabini, El Mostapha Aboulhamid, Yvon S...
VLSID
2007
IEEE
206views VLSI» more  VLSID 2007»
15 years 10 months ago
MAX: A Multi Objective Memory Architecture eXploration Framework for Embedded Systems-on-Chip
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and l...
T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindaraj...
FCCM
1999
IEEE
134views VLSI» more  FCCM 1999»
15 years 1 months ago
Runlength Compression Techniques for FPGA Configurations
The time it takes to reconfigure FPGAs can be a significant overhead for reconfigurable computing. In this paper we develop new compression algorithms for FPGA configurations that...
Scott Hauck, William D. Wilson