1156 search results - page 102 / 232 » Efficient Barriers for Distributed Shared Memory Computers |
147
Voted
TPDS
1998
15 years 3 months ago
1998
—We suggest a method of controlling the access to a secure database via quorum systems. A quorum system is a collection of sets (quorums) every two of which have a nonempty inter...
123
Voted
IEEEPACT
2008
IEEE
15 years 10 months ago
2008
IEEE
Chip Multiprocessors (CMPs) allow different applications to concurrently execute on a single chip. When applications with differing demands for memory compete for a shared cache, ...
139
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ICIP
1999
IEEE
16 years 5 months ago
1999
IEEE
In this paper, we present a VLSI architecture for separable 2-D Discrete Wavelet Transform (DWT). Based on 1-D DWT Recursive Pyramid Algorithm (RPA), a complete 2-D DWT output sch...
155
Voted
IEEEPACT
2009
IEEE
15 years 1 months ago
2009
IEEE
Transactional memory is being advanced as an alternative to traditional lock-based synchronization for concurrent programming. Transactional memory simplifies the programming mode...
158
Voted
ICPP
2008
IEEE
15 years 10 months ago
2008
IEEE
Abstract—The Sparse Matrix-Vector Multiplication kernel exhibits limited potential for taking advantage of modern shared memory architectures due to its large memory bandwidth re...