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ICCD
2002
IEEE
101views Hardware» more  ICCD 2002»
15 years 11 months ago
Improving the Efficiency of Circuit-to-BDD Conversion by Gate and Input Ordering
Boolean functions are fundamental to synthesis and verification of digital logic, and compact representations of Boolean functions have great practical significance. Popular repre...
Fadi A. Aloul, Igor L. Markov, Karem A. Sakallah
PODS
2006
ACM
138views Database» more  PODS 2006»
16 years 2 months ago
Efficiently ordering subgoals with access constraints
d Abstract] Guizhen Yang Artificial Intelligence Center SRI International Menlo Park, CA 94025, USA Michael Kifer Dept. of Computer Science Stony Brook University Stony Brook, NY 1...
Guizhen Yang, Michael Kifer, Vinay K. Chaudhri
ICSE
2004
IEEE-ACM
16 years 2 months ago
Efficient Forward Computation of Dynamic Slices Using Reduced Ordered Binary Decision Diagrams
Dynamic slicing algorithms can greatly reduce the debugging effort by focusing the attention of the user on a relevant subset of program statements. Recently algorithms for forwar...
Xiangyu Zhang, Rajiv Gupta, Youtao Zhang
DAC
1999
ACM
15 years 6 months ago
ENOR: Model Order Reduction of RLC Circuits Using Nodal Equations for Efficient Factorization
ENOR is an innovative way to produce provablypassive, reciprocal, and compact representations of RLC circuits. Beginning with the nodal equations, ENOR formulates recurrence relat...
Bernard N. Sheehan
138
Voted
IWOCA
2010
Springer
219views Algorithms» more  IWOCA 2010»
14 years 8 months ago
Efficient Chaining of Seeds in Ordered Trees
We consider here the problem of chaining seeds in ordered trees. Seeds are mappings between two trees Q and T and a chain is a subset of non overlapping seeds that is consistent wi...
Julien Allali, Cedric Chauve, Pascal Ferraro, Anne...