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» Efficient Communication in a Design Environment
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GLVLSI
2003
IEEE
152views VLSI» more  GLVLSI 2003»
15 years 6 months ago
Dynamic single-rail self-timed logic structures for power efficient synchronous pipelined designs
The realization of fast datapaths in signal processing environments requires fastest, power efficient logic styles with synchronous behavior. This paper presents a method to combi...
Frank Grassert, Dirk Timmermann
DATE
2006
IEEE
134views Hardware» more  DATE 2006»
15 years 7 months ago
ASIP-based multiprocessor SoC design for simple and double binary turbo decoding
This paper presents a new multiprocessor platform for high throughput turbo decoding. The proposed platform is based on a new configurable ASIP combined with an efficient memory a...
Olivier Muller, Amer Baghdadi, Michel Jéz&e...
86
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ICMCS
2000
IEEE
63views Multimedia» more  ICMCS 2000»
15 years 6 months ago
Unifying Conversational Multimedia Interfaces for Accessing Network Services Across Communication Devices
This paper investigates architecture and interface design issues in engineering conversational multimedia interfaces for accessing network-based services. In particular, we focus ...
Giuseppe Di Fabbrizio, S. Narayanan, P. Ruscitti, ...
DATE
2009
IEEE
119views Hardware» more  DATE 2009»
15 years 8 months ago
On-chip communication architecture exploration for processor-pool-based MPSoC
— MPSoC is evolving towards processor-pool (PP)-based architectures, which employ hierarchical on-chip network for inter- and intra-PP communication. Since the design space of PP...
Young-Pyo Joo, Sungchan Kim, Soonhoi Ha

Lecture Notes
439views
16 years 11 months ago
Laboratories for Data Communications and Computer Networking
This is a series of laboratory exercises designed for use in data communication, computer networking and telecommunication courses. These labs enable students to experiment with va...
Raj Jain