Sciweavers

795 search results - page 73 / 159
» Efficient Coupling of Parallel Applications Using PAWS
Sort
View
102
Voted
ACSC
2006
IEEE
15 years 8 months ago
Throughput fairness in k-ary n-cube networks
The performance of an interconnection network is measured by two metrics: average latency and peak network throughput. Network throughput is the total number of packets delivered ...
Cruz Izu
175
Voted
ERSA
2007
194views Hardware» more  ERSA 2007»
15 years 4 months ago
A Scalable and Reconfigurable Shared-Memory Graphics Cluster Architecture
Abstract: If the computational demands of an interactive graphics rendering application cannot be met by a single commodity Graphics Processing Unit (GPU), multiple graphics accele...
Ross Brennan, Michael Manzke, Keith O'Conor, John ...
119
Voted
DSD
2006
IEEE
131views Hardware» more  DSD 2006»
15 years 6 months ago
Designing Efficient Irregular Networks for Heterogeneous Systems-on-Chip
Abstract-- Networks-on-Chip will serve as the central integration platform in future complex SoC designs, composed of a large number of heterogeneous processing resources. Most res...
Christian Neeb, Norbert Wehn
ICCAD
2008
IEEE
147views Hardware» more  ICCAD 2008»
15 years 11 months ago
Overlay aware interconnect and timing variation modeling for double patterning technology
— As Double Patterning Technology (DPT) becomes the only solution for 32-nm lithography process, we need to investigate how DPT affects the performance of a chip. In this paper, ...
Jae-Seok Yang, David Z. Pan
HPDC
2010
IEEE
15 years 3 months ago
Exploring application and infrastructure adaptation on hybrid grid-cloud infrastructure
Clouds are emerging as an important class of distributed computational resources and are quickly becoming an integral part of production computational infrastructures. An importan...
Hyunjoo Kim, Yaakoub El Khamra, Shantenu Jha, Mani...