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DAC
2004
ACM
15 years 2 months ago
Area-efficient instruction set synthesis for reconfigurable system-on-chip designs
Silicon compilers are often used in conjunction with Field Programmable Gate Arrays (FPGAs) to deliver flexibility, fast prototyping, and accelerated time-to-market. Many of these...
Philip Brisk, Adam Kaplan, Majid Sarrafzadeh
ASAP
2004
IEEE
102views Hardware» more  ASAP 2004»
15 years 1 months ago
A Hierarchical Classification Scheme to Derive Interprocess Communication in Process Networks
The Compaan compiler automatically derives a Process Network (PN) description from an application written in Matlab. The basic element of a PN is a Producer/Consumer (P/C) pair. F...
Alexandru Turjan, Bart Kienhuis, Ed F. Deprettere
CODES
2004
IEEE
15 years 1 months ago
Dynamic overlay of scratchpad memory for energy minimization
The memory subsystem accounts for a significant portion of the aggregate energy budget of contemporary embedded systems. Moreover, there exists a large potential for optimizing th...
Manish Verma, Lars Wehmeyer, Peter Marwedel
EH
2004
IEEE
117views Hardware» more  EH 2004»
15 years 1 months ago
Multi-objective Optimization of a Parameterized VLIW Architecture
The use of Application Specific Instruction-set Processors (ASIP) in embedded systems is a solution to the problem of increasing complexity in the functions these systems have to ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...
92
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INFOCOM
2000
IEEE
15 years 1 months ago
Heuristic Algorithms for Joint Configuration of the Optical and Electrical Layer in Multi-Hop Wavelength Routing Networks
An efficient and general graph-theoretic model (the Wavelength-Graph (WG)) has been proposed which enables solving the static Routing and Wavelength Assignment (RWA) problems in Mu...
Tibor Cinkler, Dániel Marx, Claus Popp Lars...