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IISWC
2008
IEEE
15 years 6 months ago
Accelerating multi-core processor design space evaluation using automatic multi-threaded workload synthesis
The design and evaluation of microprocessor architectures is a difficult and time-consuming task. Although small, handcoded microbenchmarks can be used to accelerate performance e...
Clay Hughes, Tao Li
BMCBI
2006
150views more  BMCBI 2006»
14 years 11 months ago
Predicting protein subcellular locations using hierarchical ensemble of Bayesian classifiers based on Markov chains
Background: The subcellular location of a protein is closely related to its function. It would be worthwhile to develop a method to predict the subcellular location for a given pr...
Alla Bulashevska, Roland Eils
CVPR
2007
IEEE
16 years 1 months ago
Trace Ratio vs. Ratio Trace for Dimensionality Reduction
A large family of algorithms for dimensionality reduction end with solving a Trace Ratio problem in the form of arg maxW Tr(WT SpW)/Tr(WT SlW)1 , which is generally transformed in...
Huan Wang, Shuicheng Yan, Dong Xu, Xiaoou Tang, Th...