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» Efficient Model Checking of PSL Safety Properties
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SIGSOFT
2003
ACM
16 years 12 days ago
A strategy for efficiently verifying requirements
This paper describes a compositional proof strategy for verifying properties of requirements specifications. The proof strategy, which may be applied using either a model checker ...
Ralph D. Jeffords, Constance L. Heitmeyer
VLSID
2007
IEEE
97views VLSI» more  VLSID 2007»
16 years 1 days ago
Efficient Microprocessor Verification using Antecedent Conditioned Slicing
We present a technique for automatic verification of pipelined microprocessors using model checking. Antecedent conditioned slicing is an efficient abstraction technique for hardw...
Shobha Vasudevan, Vinod Viswanath, Jacob A. Abraha...
CAV
2010
Springer
161views Hardware» more  CAV 2010»
15 years 3 months ago
Directed Proof Generation for Machine Code
We present the algorithms used in MCVETO (Machine-Code VErification TOol), a tool to check whether a stripped machinecode program satisfies a safety property. The verification p...
Aditya V. Thakur, Junghee Lim, Akash Lal, Amanda B...
ECOOP
2006
Springer
15 years 1 months ago
Scoped Types and Aspects for Real-Time Java
Real-time systems are notoriously difficult to design and implement, and, as many real-time problems are safety-critical, their solutions must be reliable as well as efficient and ...
Chris Andreae, Yvonne Coady, Celina Gibbs, James N...
DATE
2006
IEEE
117views Hardware» more  DATE 2006»
15 years 5 months ago
Formal verification of systemc designs using a petri-net based representation
This paper presents an effective approach to formally verify SystemC designs. The approach translates SystemC models into a Petri-Net based representation. The Petri-net model is ...
Daniel Karlsson, Petru Eles, Zebo Peng