204 search results - page 18 / 41 » Efficient Modeling of Embedded Memories in Bounded Model Che... |
VLSID
2003
IEEE
15 years 10 months ago
2003
IEEE
Most verification tools and methodologies such as model checking, equivalence checking, hardware verification, software verification, and hardware-software coverification often fl...
107
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VLSID
2004
IEEE
15 years 10 months ago
2004
IEEE
This paper presents a novel technique for abstracting designs in order to increase the efficiency of formal property checking. Bounded Model Checking (BMC), using Satisfiability (...
LCTRTS
2004
Springer
15 years 3 months ago
2004
Springer
We present a polynomial upper bound for flattening of UML statecharts. An efficient flattening technique is derived and implemented in SCOPE—a code generator targeting constra...
104
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FM
2008
Springer
14 years 11 months ago
2008
Springer
The declarative modeling language Alloy and its automatic analyzer provide an effective tool-set for building designs of systems and checking their properties. The Alloy Analyzer p...
DAC
1998
ACM
15 years 10 months ago
1998
ACM
Successive, formal refinement is a new approach for specification of embedded systems using a general-purpose programming language. Systems are formally modeled as Abstractable Sy...