75 search results - page 6 / 15 » Efficient Place and Route for Pipeline Reconfigurable Archit... |
126
click to vote
DAGSTUHL
2006
15 years 3 months ago
2006
This paper presents a method of constructing pre-routed FPGA cores which lays the foundations for a rapid system construction framework for dynamically reconfigurable computing sy...
127
Voted
FPGA
2000
ACM
15 years 5 months ago
2000
ACM
In recent years the application space of reconfigurable devices has grown to include many platforms with a strong need for fault tolerance. While these systems frequently contain ...
141
click to vote
FPGA
2008
ACM
15 years 2 months ago
2008
ACM
The Field Programmable Counter Array (FPCA) was introduced to improve FPGA performance for arithmetic circuits. An FPCA is a reconfigurable IP core that can be integrated into an ...
111
click to vote
GLVLSI
2008
IEEE
15 years 2 months ago
2008
IEEE
This paper presents an improved Tree-based architecture that unifies two unidirectional programmable networks: A predictible downward network based on the Butterfly-FatTree topolo...
123
click to vote
ERSA
2006
15 years 3 months ago
2006
- In this paper, we present a prototype FPGA design for an efficient physical layer implementation of a MIMO-OFDM technique. We propose a pipelined architecture using a Fast Fourie...