279 search results - page 11 / 56 » Efficient Power Co-Estimation Techniques for System-on-Chip ... |
DATE
2002
IEEE
15 years 2 months ago
2002
IEEE
In this paper, we present an efficient methodology to validate high performance algorithms and prototype them using reconfigurable hardware. We follow a strict topdown Hardware/So...
VLSID
2007
IEEE
15 years 10 months ago
2007
IEEE
With scaling of CMOS technologies, sub-threshold, gate and reverse biased junction band-to-band-tunneling leakage have increased dramatically. Together they account for more than 2...
CL
2000
Springer
15 years 1 months ago
2000
Springer
This paper reports on the design and implementation of FLORA -- a powerful DOOD system that incorporates the features of F-logic, HiLog, and Transaction Logic. FLORA is implemented...
ISLPED
2006
ACM
15 years 3 months ago
2006
ACM
This paper addresses the problem of low-power fanout optimization. We show that due to neglecting short-circuit current, previous analytical techniques proposed to optimize the ar...
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CORR
2010
Springer
14 years 7 months ago
2010
Springer
Energy consumption is a critical design issue in real-time systems, especially in battery- operated systems. Maintaining high performance, while extending the battery life between...