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PLDI
2004
ACM
13 years 11 months ago
Jedd: a BDD-based relational extension of Java
In this paper we present Jedd, a language extension to Java that supports a convenient way of programming with Binary Decision Diagrams (BDDs). The Jedd language abstracts BDDs as...
Ondrej Lhoták, Laurie J. Hendren
APN
2008
Springer
13 years 8 months ago
MC-SOG: An LTL Model Checker Based on Symbolic Observation Graphs
Model checking is a powerful and widespread technique for the verification of finite distributed systems. However, the main hindrance for wider application of this technique is the...
Kais Klai, Denis Poitrenaud
ARC
2006
Springer
122views Hardware» more  ARC 2006»
13 years 10 months ago
UNITE: Uniform Hardware-Based Network Intrusion deTection Engine
Abstract. Current software implementations of network intrusion detection reach a maximum network connection speed of about 1Gbps (Gigabits per second). This paper analyses the Sno...
Sherif Yusuf, Wayne Luk, M. K. N. Szeto, William G...
ICCAD
1999
IEEE
81views Hardware» more  ICCAD 1999»
13 years 10 months ago
Modeling design constraints and biasing in simulation using BDDs
Constraining and input biasing are frequently used techniques in functional verification methodologies based on randomized simulation generation. Constraints confine the simulatio...
Jun Yuan, Kurt Shultz, Carl Pixley, Hillel Miller,...
VLSID
1999
IEEE
100views VLSI» more  VLSID 1999»
13 years 10 months ago
Satisfiability-Based Detailed FPGA Routing
In this paper we address the problem of detailed FPGA routing using Boolean formulation methods. In the context of FPGA routing where routing resources are fixed, Boolean formulat...
Gi-Joon Nam, Karem A. Sakallah, Rob A. Rutenbar