Sciweavers

391 search results - page 1 / 79
» Efficient Self-Reconfigurable Implementations Using On-chip ...
Sort
View
FPL
2000
Springer
115views Hardware» more  FPL 2000»
13 years 10 months ago
Efficient Self-Reconfigurable Implementations Using On-chip Memory
abstract the dynamic nature of a computation to embedded data memory (which is accessible on-chip). The dynamic nature of a computation corresponds to the dynamic features of its i...
Sameer Wadhwa, Andreas Dandalis
TPDS
2010
260views more  TPDS 2010»
13 years 4 months ago
Real-Time Modeling of Wheel-Rail Contact Laws with System-On-Chip
—This paper presents the development and implementation of a multiprocessor system-on-chip solution for fast and real time simulations of complex and nonlinear wheel-rail contact...
Yongji Zhou, T. X. Mei, Steven Freear
TCAD
2010
124views more  TCAD 2010»
13 years 1 months ago
A Reconfigurable Source-Synchronous On-Chip Network for GALS Many-Core Platforms
Abstract--This paper presents a GALS-compatible circuitswitched on-chip network that is well suited for use in many-core platforms targeting streaming DSP and embedded applications...
Anh Thien Tran, Dean Nguyen Truong, Bevan M. Baas
ASPDAC
2007
ACM
116views Hardware» more  ASPDAC 2007»
13 years 10 months ago
Effective OpenMP Implementation and Translation For Multiprocessor System-On-Chip without Using OS
- It is attractive to use the OpenMP as a parallel programming model on a Multiprocessor System-On-Chip (MPSoC) because it is easy to write a parallel program in the OpenMP and the...
Woo-Chul Jeun, Soonhoi Ha
TVLSI
2010
13 years 1 months ago
A Reverse-Encoding-Based On-Chip Bus Tracer for Efficient Circular-Buffer Utilization
Hardware debuggers and logic analyzers must be able to record a continuous trace of data. Since the trace data are tremendous, to save space, these traces are often compressed. The...
Fu-Ching Yang, Cheng-Lung Chiang, Ing-Jer Huang