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FDL
2003
IEEE
15 years 2 months ago
Design and Power Analysis in SysteC of an I2C Bus Driver
The paper presents a methodology to integrate information on power consumption in a high level functional description of a System-on-chip. The power dissipated during the executio...
Marco Caldari, Massimo Conti, Paolo Crippa, Simone...
DATE
2003
IEEE
103views Hardware» more  DATE 2003»
15 years 2 months ago
Verification of the RF Subsystem within Wireless LAN System Level Simulation
Today’s mobile communication systems use sophisticated signal processing to achieve high transmission rates. Therefore a high complexity in the digital system part as well as ve...
Uwe Knöchel, Thomas Markwirth, Jürgen Ha...
FDL
2004
IEEE
15 years 1 months ago
SystemC and OCAPI-xl Based System-Level Design for Reconfigurable Systems-on-Chip
Reconfigurability is becoming an important part of System-on-Chip (SoC) design to cope with the increasing demands for simultaneous flexibility and computational power. Current ha...
Kari Tiensyrjä, Miroslav Cupák, Kostas...
ANSS
2008
IEEE
15 years 3 months ago
Resource Allocation Strategies in a 2-Level Hierarchical Grid System
Efficient job scheduling in grids is challenging due to the large number of distributed autonomous resources. In this paper we study various resource allocation policies in a 2-le...
Stylianos Zikos, Helen D. Karatza
DAC
2004
ACM
15 years 10 months ago
System design for DSP applications in transaction level modeling paradigm
In this paper, we systematically define three transaction level TLMs), which reside at different levels of abstraction between the functional and the implementation model of a DSP...
Abhijit K. Deb, Axel Jantsch, Johnny Öberg