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VLSISP
2008
95views more  VLSISP 2008»
14 years 11 months ago
Design of an H.264/AVC Decoder with Memory Hierarchy and Line-Pixel-Lookahead
This paper describes a novel memory hierarchy and line-pixel-lookahead (LPL) for an H.264/AVC video decoder. The memory system is the bottleneck of most video processors, particula...
Tsu-Ming Liu, Chen-Yi Lee
CORR
2010
Springer
143views Education» more  CORR 2010»
14 years 12 months ago
Opportunistic Routing in Ad Hoc Networks: How many relays should there be? What rate should nodes use?
Opportunistic routing is a multi-hop routing scheme which allows for selection of the best immediately available relay. In blind opportunistic routing protocols, where transmitters...
Joseph Blomer, Nihar Jindal
DT
2000
88views more  DT 2000»
14 years 11 months ago
Postsilicon Validation Methodology for Microprocessors
f abstraction as applicable to break the problem's complexity, and innovating better techniques to address complexity of new microarchitectural features. Validation techniques...
Hemant G. Rotithor
ACSD
2009
IEEE
139views Hardware» more  ACSD 2009»
15 years 6 months ago
Biologically-Inspired Massively-Parallel Architectures - Computing Beyond a Million Processors
The SpiNNaker project aims to develop parallel computer systems with more than a million embedded processors. The goal of the project is to support largescale simulations of syste...
Stephen B. Furber, Andrew D. Brown
TWC
2010
14 years 6 months ago
Optimized Training Sequences for Spatially Correlated MIMO-OFDM
In this paper, the training sequence design for multiple-input multiple-output (MIMO) orthogonal frequencydivision multiplexing (OFDM) systems under the minimum mean square error (...
Hoang Duong Tuan, Ha Hoang Kha, Ha H. Nguyen, Viet...