Sciweavers

1466 search results - page 197 / 294
» Efficient Simulation of Synthesis-Oriented System Level Desi...
Sort
View
ISLPED
2003
ACM
155views Hardware» more  ISLPED 2003»
15 years 5 months ago
Low-power high-level synthesis for FPGA architectures
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...
Deming Chen, Jason Cong, Yiping Fan
ASPDAC
2006
ACM
148views Hardware» more  ASPDAC 2006»
15 years 3 months ago
TAPHS: thermal-aware unified physical-level and high-level synthesis
Thermal effects are becoming increasingly important during integrated circuit design. Thermal characteristics influence reliability, power consumption, cooling costs, and performan...
Zhenyu (Peter) Gu, Yonghong Yang, Jia Wang, Robert...
PARLE
1987
15 years 3 months ago
Emulating Digital Logic using Transputer Networks (very High Parallelism = Simplicity = Performance)
Modern VLSI technology has changed the economic rules by which the balance between processing power, memory and communications is decided in computing systems. This will have a pr...
Peter H. Welch
TWC
2008
129views more  TWC 2008»
14 years 11 months ago
Adaptive Minimum Symbol Error Rate Beamforming Assisted Detection for Quadrature Amplitude Modulation
We consider beamforming assisted detection for multiple antenna aided multiuser systems that employ the bandwidth efficient quadrature amplitude modulation scheme. A minimum symbol...
Sheng Chen, Andy Livingstone, H.-Q. Du, Lajos Hanz...
DAC
2004
ACM
16 years 25 days ago
An integrated hardware/software approach for run-time scratchpad management
An ever increasing number of dynamic interactive applications are implemented on portable consumer electronics. Designers depend largely on operating systems to map these applicat...
Francesco Poletti, Paul Marchal, David Atienza, Lu...