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HIPEAC
2010
Springer
14 years 7 months ago
Energy and Throughput Efficient Transactional Memory for Embedded Multicore Systems
We propose a new design for an energy-efficient hardware transactional memory (HTM) system for power-aware embedded devices. Prior hardware transactional memory designs proposed a ...
Cesare Ferri, Samantha Wood, Tali Moreshet, R. Iri...
TIT
2002
73views more  TIT 2002»
14 years 9 months ago
Power levels and packet lengths in random multiple access
This paper extends our earlier results. We assume that the receiver has the capability of capturing multiple packets so long as the signal-to-interference-plus-noise ratio (SINR) o...
Wei Luo, Anthony Ephremides
DATE
2004
IEEE
134views Hardware» more  DATE 2004»
15 years 1 months ago
Context-Aware Performance Analysis for Efficient Embedded System Design
Performance analysis has many advantages in theory compared to simulation for the validation of complex embedded systems, but is rarely used in practice. To make analysis more att...
Marek Jersak, Rafik Henia, Rolf Ernst
WSC
2008
14 years 11 months ago
Clarifying CONWIP versus push system behavior using simulation
This research examines the performance of CONWIP versus "push" workload control in a simple, balanced manufacturing flowline. Analytical models and simulation experiment...
S. T. Enns, Paul Rogers
86
Voted
ISLPED
2003
ACM
115views Hardware» more  ISLPED 2003»
15 years 2 months ago
Reducing energy and delay using efficient victim caches
In this paper, we investigate methods for improving the hit rates in the first level of memory hierarchy. Particularly, we propose victim cache structures to reduce the number of ...
Gokhan Memik, Glenn Reinman, William H. Mangione-S...