1466 search results - page 26 / 294 » Efficient Simulation of Synthesis-Oriented System Level Desi... |
DATE
2003
IEEE
15 years 2 months ago
2003
IEEE
A primary goal of high-level modeling is to efficiently explore a broad design space, converging on an optimal or near-optimal system architecture before moving to a more detaile...
DATE
2007
IEEE
15 years 3 months ago
2007
IEEE
: - The rising complexity of modern embedded systems is causing a significant increase in the verification effort required by hardware designers and software developers, leading to...
WSC
1998
14 years 10 months ago
1998
Parallel discrete event simulation (PDES) decreases a simulation's runtime by splitting the simulation's work between multiple processors. Many users avoid PDES because ...
DAC
2006
ACM
15 years 3 months ago
2006
ACM
This paper describes how systems companies are adopting SystemC transaction level models for system on chip design and verification, and how these transaction level models are bei...
IEEEIAS
2009
IEEE
14 years 7 months ago
2009
IEEE
In this paper, we propose a framework to develop highperformance system accelerator hardware and the corresponding software at system-level. This framework is designed by integrat...