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ICCAD
2001
IEEE
185views Hardware» more  ICCAD 2001»
15 years 8 months ago
Application-Driven Processor Design Exploration for Power-Performance Trade-off Analysis
1 - This paper presents an efficient design exploration environment for high-end core processors. The heart of the proposed design exploration framework is a two-level simulation e...
Diana Marculescu, Anoop Iyer
DATE
2004
IEEE
130views Hardware» more  DATE 2004»
15 years 3 months ago
Utilizing Formal Assertions for System Design of Network Processors
System level modeling with executable languages such as C/C++ has been crucial in the development of large electronic systems from general processors to application specific desig...
Xi Chen, Yan Luo, Harry Hsieh, Laxmi N. Bhuyan, Fe...
WSC
2007
15 years 2 months ago
Simulation experimental investigation on job release control in semiconductor wafer fabrication
This paper presents a new job release methodology, WIPLOAD Control, especially in semiconductor wafer fabrication environment. The performance of the proposed methodology is evalu...
Chao Qi, Appa Iyer Sivakumar, Stanley B. Gershwin
HPCA
2003
IEEE
16 years 6 days ago
A Methodology for Designing Efficient On-Chip Interconnects on Well-Behaved Communication Patterns
As the level of chip integration continues to advance at a fast pace, the desire for efficient interconnects-whether on-chip or off-chip--is rapidly increasing. Traditional interc...
Wai Hong Ho, Timothy Mark Pinkston
ISVLSI
2006
IEEE
150views VLSI» more  ISVLSI 2006»
15 years 5 months ago
Design and Analysis of a Low Power VLIW DSP Core
Power consumption has been the primary issue in processor design, with various power reduction strategies being adopted from system-level to circuitlevel. In order to develop a po...
Chan-Hao Chang, Diana Marculescu