1466 search results - page 57 / 294 » Efficient Simulation of Synthesis-Oriented System Level Desi... |
122
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CODES
2007
IEEE
15 years 1 months ago
2007
IEEE
In this paper, we propose an efficient technique for run-time application mapping onto Network-on-Chip (NoC) platforms with multiple voltage levels. Our technique consists of a re...
DAC
1998
ACM
15 years 4 months ago
1998
ACM
The di culty of embedded system co-design is increasing rapidly due to the increasing complexity of individual parts, the variety of parts available and pressure to use multiple p...
DAC
1999
ACM
15 years 4 months ago
1999
ACM
IPCHINOOK is a design tool for distributed embedded systems. It gains leverage from the use of a carefully chosen set of design ions that raise the level of designer interaction d...
CODES
2006
IEEE
15 years 6 months ago
2006
IEEE
This paper presents a methodology to combine Transaction Level Modeling and System/Network co-simulation for the design of networked embedded systems. As a result, a new design di...
114
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JSA
2010
14 years 6 months ago
2010
The high chip-level integration enables the implementation of large-scale parallel processing architectures with 64 and more processing nodes on a single chip or on an FPGA device...