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ISCAS
2011
IEEE
342views Hardware» more  ISCAS 2011»
14 years 3 months ago
Parallel Dynamic Voltage and Frequency Scaling for stream decoding using a multicore embedded system
—Parallel structures may be used to increase a system processing speed in case of large amount of data or highly complex calculations. Dynamic Voltage and Frequency Scaling (DVFS...
Ying-Xun Lai, Yueh-Min Huang, Chin-Feng Lai, Ljilj...
DAC
2001
ACM
16 years 26 days ago
Latency-Driven Design of Multi-Purpose Systems-On-Chip
Milenko Drinic UCLA Computer Science Dep. 4732 Boelter Hall Los Angeles, CA 90095-1596 milenko@cs.ucla.edu Darko Kirovski Microsoft Research One Microsoft Way Redmond, WA 98052 da...
Seapahn Meguerdichian, Milenko Drinic, Darko Kirov...
GI
2009
Springer
14 years 9 months ago
Coarse graining of an individual-based plant model
: The evolution and structuring of plant communities is governed by local plant-to-plant interaction. It has been shown that the individual variability of the organisms and the spa...
Johannes Hoefener, Lars Rudolf, Uta Berger, Thilo ...
IOPADS
1996
100views more  IOPADS 1996»
15 years 1 months ago
ENWRICH a Compute-Processor Write Caching Scheme for Parallel File Systems
Many parallel scientific applications need high-performance I/O. Unfortunately, end-to-end parallel-I/O performance has not been able to keep up with substantial improvements in p...
Apratim Purakayastha, Carla Schlatter Ellis, David...
CODES
2006
IEEE
15 years 3 months ago
Increasing hardware efficiency with multifunction loop accelerators
To meet the conflicting goals of high-performance low-cost embedded systems, critical application loop nests are commonly executed on specialized hardware accelerators. These loop...
Kevin Fan, Manjunath Kudlur, Hyunchul Park, Scott ...