1466 search results - page 88 / 294 » Efficient Simulation of Synthesis-Oriented System Level Desi... |
102
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IPCCC
2006
IEEE
15 years 6 months ago
2006
IEEE
Low power has been considered as an important issue in instruction cache (I-cache) designs. Several studies have shown that the I-cache can be tuned to reduce power. These techniq...
106
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ASAP
2005
IEEE
15 years 5 months ago
2005
IEEE
As billion transistor System-on-chips (SoC) become commonplace and design complexity continues to increase, designers are faced with the daunting task of meeting escalating design...
CORR
1999
Springer
14 years 11 months ago
1999
Springer
In this paper we present an application of explanation-based learning (EBL) in the parsing module of a real-time English-Spanish machine translation system designed to translate c...
108
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ICCD
2000
IEEE
15 years 3 months ago
2000
IEEE
A major obstacle to widespread acceptance of formal verification is the difficulty in using the tools effectively. Although learning the basic syntax and operation of a formal ver...
102
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VLSID
2006
IEEE
15 years 5 months ago
2006
IEEE
This tutorial focuses on advanced techniques to cope with the complexity of designing modern digital chips which are complete systems often containing multiple processors, complex...