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ASPDAC
2006
ACM
109views Hardware» more  ASPDAC 2006»
15 years 3 months ago
Cycle error correction in asynchronous clock modeling for cycle-based simulation
— As the complexity of SoCs is increasing, hardware/software co-verification becomes an important part of system verification. C-level cycle-based simulation could be an efficien...
Junghee Lee, Joonhwan Yi
104
Voted
AC
2005
Springer
14 years 9 months ago
Power Analysis and Optimization Techniques for Energy Efficient Computer Systems
Reducing power consumption has become a major challenge in the design and operation of today's computer systems. This chapter describes different techniques addressing this c...
Wissam Chedid, Chansu Yu, Ben Lee
CL
2010
Springer
14 years 9 months ago
SystemJ: A GALS language for system level design
In this paper we present the syntax, semantics, and compilation of a new system-level programming language called SystemJ. SystemJ is a multiclock language supporting the Globally...
Avinash Malik, Zoran Salcic, Partha S. Roop, Alain...
CORR
2010
Springer
105views Education» more  CORR 2010»
14 years 6 months ago
On Designing Multicore-aware Simulators for Biological Systems
The stochastic simulation of biological systems is an increasingly popular technique in bioinformatics. It often is an enlightening technique, which may however result in being com...
Marco Aldinucci, Mario Coppo, Ferruccio Damiani, M...
87
Voted
TECS
2008
122views more  TECS 2008»
14 years 9 months ago
Quantitative analysis of the speed/accuracy trade-off in transaction level modeling
tion. Transaction Level Modeling (TLM) has been proposed to abstract communication for highspeed system simulation and rapid design space exploration. Although being widely accepte...
Gunar Schirner, Rainer Dömer