38 search results - page 3 / 8 » Efficient Techniques for Directed Test Generation Using Incr... |
ICCAD
2010
IEEE
13 years 4 months ago
2010
IEEE
Craig Interpolation is a state-of-the-art technique for logic synthesis and verification, based on Boolean Satisfiability (SAT). Leveraging the efficacy of SAT algorithms, Craig In...
IFIP
2001
Springer
13 years 10 months ago
2001
Springer
— Semi-formal verification based on symbolic simulation offers a good compromise between formal model checking and numerical simulation. The generation of functional test vector...
DAC
1994
ACM
13 years 10 months ago
1994
ACM
A powerful combinational path sensitization engine is required for the efficient implementation of tools for test pattern generation, timing analysis, and delay fault testing. Path...
EDBT
2009
ACM
13 years 10 months ago
2009
ACM
Many Web applications are based on dynamic interactions between Web components exchanging flows of information. Such a situation arises for instance in mashup systems or when moni...
VTS
2005
IEEE
13 years 12 months ago
2005
IEEE
TARO test patterns are transition fault test patterns that sensitize each transition fault to all of the outputs that can be reached from the fault location. We were not able to i...