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90
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ISSS
1999
IEEE
151views Hardware» more  ISSS 1999»
15 years 2 months ago
Optimized System Synthesis of Complex RT Level Building Blocks from Multirate Dataflow Graphs
In order to cope with the ever increasing complexity of todays application specific integrated circuits, a building block based design methodology is established. The system is co...
Jens Horstmannshoff, Heinrich Meyr
MICRO
1998
IEEE
91views Hardware» more  MICRO 1998»
15 years 2 months ago
Effective Cluster Assignment for Modulo Scheduling
Clustering is one solution to the demand for wideissue machines and fast clock cycles because it allows for smaller, less ported register files and simpler bypass logic while rema...
Erik Nystrom, Alexandre E. Eichenberger
91
Voted
TWC
2008
101views more  TWC 2008»
14 years 10 months ago
Simplified receiver design for STBC binary continuous phase modulation
Abstract-- Existing space-time codes have focused on multipleantenna systems with linear modulation schemes such as phaseshift keying and quadrature amplitude modulation. Continuou...
L. Xian, R. Punnoose, H. Liu
TSP
2010
14 years 4 months ago
Robust distributed source coder design by deterministic annealing
This paper considers the design of efficient quantizers for a robust distributed source coding system. The information is encoded at independent terminals and transmitted across se...
Ankur Saxena, Jayanth Nayak, Kenneth Rose
DATE
2010
IEEE
174views Hardware» more  DATE 2010»
14 years 8 months ago
An HVS-based Adaptive Computational Complexity Reduction Scheme for H.264/AVC video encoder using Prognostic Early Mode Exclusio
The H.264/AVC video encoder standard significantly improves the compression efficiency by using variable block-sized Inter (P) and Intra (I) Macroblock (MB) coding modes. In this p...
Muhammad Shafique, Bastian Molkenthin, Jörg H...