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» Efficient Wire Formats for High Performance Computing
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ISLPED
1995
ACM
112views Hardware» more  ISLPED 1995»
15 years 8 months ago
Ultra-low-power analog associative memory core using flash-EEPROM-based programmable capacitors
Analog techniques can lead to ultra-efficient computational systems when applied to the right applications. The problem of associative memory is well suited to array-based analog ...
Alan Kramer, Roberto Canegallo, Mauro Chinosi, D. ...
CCGRID
2009
IEEE
15 years 2 months ago
Block-Based Concurrent and Storage-Aware Data Streaming for Grid Applications with Lots of Small Files
Data streaming management and scheduling is required by many grid computing applications, especially when the volume of data to be processed is extremely high while available stor...
Wen Zhang, Junwei Cao, Yisheng Zhong, Lianchen Liu...
126
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CISIM
2008
IEEE
15 years 11 months ago
Scheduling in Multiprocessor System Using Genetic Algorithms
Multiprocessors have emerged as a powerful computing means for running real-time applications, especially where a uniprocessor system would not be sufficient enough to execute all...
Keshav P. Dahal, M. Alamgir Hossain, Benny Varghes...
DAC
2008
ACM
16 years 5 months ago
An area-efficient high-throughput hybrid interconnection network for single-chip parallel processing
Single-chip parallel processing requires high bandwidth between processors and on-chip memory modules. A recently proposed Mesh-of-Trees (MoT) network provides high throughput and...
Aydin O. Balkan, Gang Qu, Uzi Vishkin
ICNP
2003
IEEE
15 years 9 months ago
Packet Classification Using Extended TCAMs
CAMs are the most popular practical method for implementing packet classification in high performance routers. Their principal drawbacks are high power consumption and inefficient...
Ed Spitznagel, David E. Taylor, Jonathan S. Turner