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» Efficient Wire Formats for High Performance Computing
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ISCA
2010
IEEE
229views Hardware» more  ISCA 2010»
15 years 2 months ago
Understanding sources of inefficiency in general-purpose chips
Due to their high volume, general-purpose processors, and now chip multiprocessors (CMPs), are much more cost effective than ASICs, but lag significantly in terms of performance a...
Rehan Hameed, Wajahat Qadeer, Megan Wachs, Omid Az...
241
Voted
ASPLOS
2009
ACM
16 years 5 months ago
Optimization of tele-immersion codes
As computational power increases, tele-immersive applications are an emerging trend. These applications make extensive demands on computational resources through their heavy use o...
Albert Sidelnik, I-Jui Sung, Wanmin Wu, Marí...
3DPVT
2004
IEEE
194views Visualization» more  3DPVT 2004»
15 years 8 months ago
Thickness Histogram and Statistical Harmonic Representation for 3D Model Retrieval
Similarity measuring is a key problem for 3D model retrieval. In this paper, we propose a novel shape descriptor "Thickness Histogram" (TH) by uniformly estimating thick...
Yi Liu, Jiantao Pu, Hongbin Zha, Weibin Liu, Yusuk...
CATA
2004
15 years 5 months ago
The Instruction Execution Mechanism for Responsive Multithreaded Processor
This paper describes the instruction execution mechanism of Responsive Multithreaded (RMT) Processor for distributed real-time processing. The execution order of each thread is co...
Tstomu Itou, Nobuyuki Yamasaki
DAC
2007
ACM
16 years 5 months ago
RISPP: Rotating Instruction Set Processing Platform
Adaptation in embedded processing is key in order to address efficiency. The concept of extensible embedded processors works well if a few a-priori known hot spots exist. However,...
Jörg Henkel, Lars Bauer, Muhammad Shafique, S...